GTS CPRI PHY IP Design Example User Guide - This document describes the GTS CPRI PHY IP design example generation, simulation, compilation, and testing. - 2025-09-29

Version: 25.1.1

1. Quick Start Guide
1.1. Hardware and Software Requirements
1.2. Generating the Design
1.3. Directory Structure
1.4. Simulating the Design Example Testbench
2. Design Example Description
2.1. GTS CPRI PHY IP Design Example Features
2.2. Design Example Components
2.2.1. Packet Client
2.2.2. Round Trip Counter
2.2.3. Sources and Probes
2.2.4. Avalon Memory-Mapped Decoder
2.2.5. JTAG Host
2.2.6. IOPLL
2.2.7. System PLL
2.2.8. Reset Sequencer
2.3. Simulation Design Example
2.4. Hardware Design Example
2.5. Interface Signals
2.6. Design Example Registers
3. GTS CPRI PHY IP Design Example User Guide Archives
4. Document Revision History for GTS CPRI PHY IP Design Example User Guide

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