GTS JESD204C Intel® FPGA IP Design Example User Guide - Agilex™ 5 SoC FPGA provides an Arm* Cortex* -A76 and Arm* Cortex* -A55 Core MPU Hard Processor System with a variety of hard IP, dedicated I/O, and direct external memory access. - 2024-07-11
- Version
- 24.2-3.0.0