Triple-Speed Ethernet Intel® FPGA IP Design Example User Guide: Agilex™ 5 FPGAs and SoCs - Provides features and functionality of the Agilex™ 5 embedded memory blocks. The Agilex™ 5 embedded memory blocks are flexible and provide an optimal amount of various sized memory arrays to fit your design requirements. Includes information about the On Chip Memory RAM and ROM Intel® FPGA IP cores, eSRAM Intel® FPGA IP, FIFO Intel® FPGA IP, and Shift Register (RAM-based) Intel® FPGA IP. - 2024-07-10

Version

24.2-5.0.0