Triple-Speed Ethernet IP User Guide Agilex™ 3 and Agilex™ 5 FPGAs and SoCs - Describes the features, signals, and parameters of the Triple-Speed Ethernet IP for Agilex 3 and Agilex 5 devices. The IP incorporates 10/100/1000-Mbps Ethernet media access controller (MAC) and 1000BASE-X/SGMII physical coding sublayer (PCS) with an embedded PMA built with on-chip transceiver I/Os. - 2026-04-06
- Version
- 26.1
- Product Type
- Device Families > Agilex Families > Agilex 5
- Device Families > Agilex Families > Agilex 5 > D-Series
- Device Families > Agilex Families > Agilex 5 > E-Series
- Device Families > Agilex Families
- Device Families > Agilex Families > Agilex 3
- Device Families > Agilex Families > Agilex 3 > C-Series
- Resource Type
- Documentation > User Guides
- Source Name
- DITA