Triple-Speed Ethernet Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs - Describes the Agilex™ 5 device programmable clock routing network and I/O PLLs for clock management and synthesis. Includes information about the Clock Control Intel® FPGA IP and IOPLL Intel® FPGA IP. - 2024-07-08
- Version
- 24.2-5.0.0