1G/2.5G/5G/10G Multirate Ethernet PHY IP User Guide Agilex™ 3 and Agilex™ 5 FPGAs and SoCs - Describes the features and functions of this IP core for Agilex 3 and Agilex 5 devices. The IP implements the Ethernet protocol as defined in the IEEE 802.3 2005 Standard and consists of a physical coding sublayer (PCS) function and an embedded physical media attachment (PMA). - 2026-04-06

Version

26.1

Product Type

Device Families > Agilex Families > Agilex 5

Device Families > Agilex Families > Agilex 5 > D-Series

Device Families > Agilex Families > Agilex 5 > E-Series

Device Families > Agilex Families

Device Families > Agilex Families > Agilex 3

Device Families > Agilex Families > Agilex 3 > C-Series

Resource Type

Documentation > User Guides

Source Name

DITA