1G/2.5G/5G/10G Multirate Ethernet PHY Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs - Describes the features, signals, and parameters of the Triple-Speed Ethernet Intel® FPGA IP for Agilex™ 3 and Agilex™ 5 devices. The IP incorporates 10/100/1000-Mbps Ethernet media access controller (MAC) and 1000BASE-X/SGMII physical coding sublayer (PCS) with an embedded PMA built with on-chip transceiver I/Os. - 2024-07-12

Version

24.2-3.0.0