Low Latency 40G Ethernet Intel® FPGA IP Design Example User Guide: Agilex™ 5 FPGAs and SoCs - Describes the features, functions, and signals of the Low Latency Ethernet 10G MAC Intel® FPGA IP for Agilex™ 5 devices. The IP allows you to build a complete Ethernet subsystem in an Intel® FPGA device and connect it to an external device using the IP with an Intel® FPGA PHY IP core or any of the supported PHYs. - 2024-03-30

Version

24.1-2.1.0