Agilex™ 7 Clocking and PLL User Guide: M-Series - Describes the Agilex™ 7 FPGA M-Series device programmable clock routing network and I/O PLLs for clock management and synthesis. Includes information about the Clock Control Intel® FPGA IP, IOPLL Intel® FPGA IP, and EMIF Calibration IP. - 2024-11-27
- Version
- 24.2