This section provides examples on how to control and read the fracture registers for different Reconfiguration subset settings available in the Reconfiguration group: 100G-4 Reconfigurable. The maximum fracture count is four, and maximum PMA lane count is four.
Figure 23. Reconfiguration Subset: 100G-4, Fracture Count = 1
Figure 24. Controlling the Fracture for Reconfiguration Subset: 100G-4 and Fracture Count=1
Figure 25. Reconfiguration Subset: 50G-2, Fracture Count = 2
Figure 26. Controlling the Fracture for Reconfiguration Subset: 50G-2 and Fracture Count=2
Figure 27. Reconfiguration Subset: 25G-1, Fracture Count = 4
Figure 28. Controlling the Fracture for Reconfiguration Subset: 25G-1, Fracture Count = 4
Note: Refer to F-Tile PMA/FEC Direct PHY Intel FPGA IP
Register Map for more information and details about soft CSR
registers.