F-Tile SDI II Intel FPGA IP Design Example User Guide - Describes the SDI II Intel FPGA IP design example for Agilex 7 F-Tile devices. - 2024-07-08

Version: 24.2

1. F-Tile SDI II Intel FPGA IP Design Example Quick Start Guide
1.1. Directory Structure
1.2. Generating the Design
1.3. Simulating the Design
1.4. Compiling and Testing the Design in Hardware
1.5. Design Example Parameters
1.5.1. Design Example Presets
2. Design Example Detailed Description
2.1. Features
2.2. Hardware and Software Requirements
2.3. Functional Description
2.3.1. Design Components
2.3.2. Clocking Scheme
2.3.2.1. Clocking Scheme Components
2.4. Simulation
2.4.1. Testbench Components
2.4.2. Test Description
2.5. Hardware Testing
2.5.1. Parallel loopback
2.5.2. Serial loopback
2.6. Interface Signal
3. F-Tile SDI II Intel FPGA IP Design Example User Guide Archives
4. Document Revision History for the F-Tile SDI II Intel FPGA IP Design Example User Guide

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