1G/2.5G/5G/10G Multi-rate Ethernet PHY Intel® Stratix® 10 FPGA IP User Guide - Describes the features and functions of this IP core for Intel® Stratix® 10 devices. The IP implements the Ethernet protocol as defined in the IEEE 802.3 2005 Standard and consists of a physical coding sublayer (PCS) function and an embedded physical media attachment (PMA). - 2022-02-24
- Version
- 17-1