AN 696: Using the JESD204B MegaCore Function in Arria V Devices - This application note explains how to implement and configure the JESD204B MegaCore function in Arria V FPGA devices. - 2015-05-11

1. AN 696: Using the JESD204B MegaCore Function in Arria V Devices
1.1. JESD204B MegaCore Function Reference Design
1.1.1. SYSREF Generator
1.1.2. In-System Sources and Probes (ISSP)
1.1.3. Qsys System
1.1.4. File Directory and Content
1.1.5. Reference Design Initialization Sequence
1.2. Hardware and Software Requirements
1.3. Hardware Setup
1.3.1. FPGA Pin Assignments
1.3.2. Status LED
1.4. Using the Reference Design
1.5. Using the System Console Tool to Execute Commands
1.6. JESD204B MegaCore Function Link initialization Sequences
1.7. Editing and Recompiling the Reference Design
1.8. Document Revision History

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