| Intel® Quartus® Prime Version | Description | Impact |
|---|---|---|
| 20.2 |
Initial release. This Intel FPGA IP enables direct communication between the two dies in an Intel® Stratix® 10 GX 10M variant. |
– |
| Intel® Quartus® Prime Version | Description | Impact |
|---|---|---|
| 20.2 |
Initial release. This Intel FPGA IP enables direct communication between the two dies in an Intel® Stratix® 10 GX 10M variant. |
– |