6.2.6. Programming the Core RBF file from the Updated Revision via PCIe Link - Before you begin the CvP update, confirmed the driver is fully installed and you programmed the FPGA using the base revision image through any configuration scheme. - 2025-12-16

Agilex™ 7 Device Configuration via Protocol (CvP) Implementation User Guide

Version: 23.1

Before you begin the CvP update, confirmed the driver is fully installed and you programmed the FPGA using the base revision image through any configuration scheme.

Follow these steps to program the .core.rbf:

In the terminal window, type the following command to ensure you have an active PCIe^® link.
```
lspci -vvv -d1172:
```
Follow these steps to program the .core.rbf file from the Updated Revision via PCIe^® Link:
1. Copy the .core.rbf file into /lib/firmware directory.
2. In the /lib/firmware directory, run the following command to use the FPGA manager to configure the core image.
  - Run: su to get root access.
  - Run:
```
echo <filename>.core.rbf > /sys/kernel/debug/fpga_manager/fpga0/firmware_name
```
You can see your core image running on the Agilex™ 7 FPGA PCIe^® card. Alternatively, print out the kernel message using the dmesg to ensure the CvP is completed successfully.