PHY Lite for Parallel Interfaces FPGA IP User Guide - This user guide describes the functional description, steps to generate, and guidelines to design the PHY Lite for Parallel Interfaces FPGA IP in Agilex 5 D-Series, E-Series, Agilex 7 F-Series, I-Series, and M-Series, Stratix 10 , Arria 10 , and Cyclone 10 GX devices. - 2025-03-31

Version

25.1