Networking Interface for Open Programmable Acceleration Engine: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA - This document describes how to design for the network port feature in an accelerator functional unit (AFU) design and how to provision it from the host using the Open Programmable Acceleration Engine (OPAE) driver and tools. - 2021-12-25

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1-1-production