Using Quartus® Prime software, you can generate a design example for the Multi Channel DMA for PCI Express® ( PCIe® ) IP core.
The generated design example reflects the parameters that you specify. The design example automatically creates the files necessary to simulate and compile in the Quartus® Prime software. You can download the compiled design to your FPGA Development Board. To download to custom hardware, update the Quartus® Prime Settings File (.qsf) with the correct pin assignments.
Figure 25. Design Example Development Steps