Clock Networks and PLL Clock Sources - The clock network architecture is based on Altera 's global, regional, and peripheral clock structure. This clock structure is supported by dedicated clock input pins, fractional clock synthesis PLLs, and integer I/O PLLs. - 2025-12-15

Cyclone 10 GX Device Overview

The clock network architecture is based on Altera's global, regional, and peripheral clock structure. This clock structure is supported by dedicated clock input pins, fractional clock synthesis PLLs, and integer I/O PLLs.