AN 749: Altera JESD204B IP Core and ADI AD9144 Hardware Checkout Report - 2015-12-18

1. Altera JESD204B IP Core and ADI AD9144 Hardware Checkout Report
1.1. Hardware Requirements
1.2. Hardware Setup
1.3. Hardware Checkout Methodology
1.3.1. Transmitter Data Link Layer
1.3.1.1. Code Group Synchronization (CGS)
1.3.1.2. Initial Frame and Lane Synchronization
1.3.2. Transmitter Transport Layer
1.3.3. Scrambling
1.3.4. Deterministic Latency (Subclass 1)
1.4. JESD204B IP Core and AD9144 Configurations
1.5. Test Results
1.6. Test Results Comments
1.7. Document Revision History

Back to home page