The E-Tile transceivers provide continuous data rates from 1 Gbps to 28.9 Gbps NRZ and 2 Gbps to 58 Gbps PAM4. For longer-reach backplane driving applications, the E-Tile transceivers use advanced adaptive equalization circuits to equalize system loss.
All E-Tile transceiver channels are equipped with these blocks:
- Dedicated PMA—provides primary interfacing capabilities to physical channels
- Hardened PCS—typically handles encoding and decoding, word alignment, and other preprocessing functions before transferring data to the FPGA core fabric
A single PMA–PCS channel with independent clock domains forms each transceiver within the transceiver tile. Using a highly configurable clock distribution network, you can configure various bonded and non-bonded data rate within each transceiver bank and within each transceiver tile.