9.1. Adding the HLS Compiler-Generated IP into an Quartus Prime Pro Edition Project - To use the IP generated by the Intel HLS Compiler in an Quartus Prime Pro Edition project, you must first add the .ip file to the project. - 2025-12-15

Altera High Level Synthesis Compiler Pro Edition User Guide
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24.1
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Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Pro Edition
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DITA
To use the IP generated by the Intel® HLS Compiler in an Quartus® Prime Pro Edition project, you must first add the .ip file to the project.
The .ip file contains information to add to all of the necessary HDL files for the component. It also applies to any component-specific Quartus® Prime Settings File (QSF) settings that are necessary for IP synthesis.
  1. Create an Quartus® Prime Pro Edition project.
  2. Click Project > Add/Remove Files in Project.
  3. In the Settings dialog box, browse to and select the component .ip file:
    For example, <result>.prj/components/<component_name>/<component_name>.ip
  4. Instantiate the component top-level module in the Quartus® Prime project. For an example on how to instantiate the component's top-level module, refer to the <result>.prj/components/<component_name>/<component_name>_inst.v file.