AN 860: Using Arria 10 SoC FPGA Early I/O Release - This document describes the Early I/O Release support in the Arria 10 SoC FPGA devices. - 2022-12-15

1. Introduction
1.1. Early I/O Release Use Cases
1.2. Early I/O Release Flow
2. Design Restrictions
2.1. Peripheral and Core RBF are a Matched Pair
2.2. EMIF Pin Usage Restrictions
3. Enabling I/O Release
3.1. Quartus Prime Project Settings
3.2. Platform Designer Component Settings
3.3. Creating Split RBF Images
3.4. Configuring U-Boot to use Split RBF Files
4. Debugging Early I/O Release
A. Document Revision History for Using Arria 10 SoC FPGA Early I/O Release

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