Altera JESD204B IP Core and ADI AD9250 Hardware Checkout Report - 2015-06-25

1. Altera JESD204B IP Core and ADI AD9250 Hardware Checkout Report
1.1. Hardware Requirements
1.2. Hardware Setup
1.3. Hardware Checkout Methodology
1.3.1. Receiver Data Link Layer
1.3.1.1. Code Group Synchronization (CGS)
1.3.1.2. Initial Frame and Lane Synchronization
1.3.2. Receiver Transport Layer
1.3.3. Descrambling
1.3.4. Deterministic Latency (Subclass 1)
1.4. JESD204B IP Core and AD9250 Configurations
1.5. Test Results
1.6. Test Result Comments
1.7. Document Revision History

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