FFT IP Core User Guide - 2017-11-06

Version: 17.1
Source Name: DITA

1. About This IP Core
1.1. Altera DSP IP Core Features
1.2. FFT IP Core Features
1.3. General Description
1.3.1. Fixed Transform Size FFT
1.3.2. Variable Streaming FFT
1.4. DSP IP Core Device Family Support
1.5. DSP IP Core Verification
1.6. FFT IP Core Release Information
1.7. Performance and Resource Utilization
2. FFT IP Core Getting Started
2.1. Installing and Licensing Intel FPGA IP Cores
2.1.1. Intel FPGA IP Evaluation Mode
2.1.2. FFT IP Core Intel FPGA IP Evaluation Mode Timeout Behavior
2.2. IP Catalog and Parameter Editor
2.3. Generating IP Cores ( Intel Quartus Prime Pro Edition)
2.3.1. IP Core Generation Output ( Intel Quartus Prime Pro Edition)
2.4. Generating IP Cores ( Intel Quartus Prime Standard Edition)
2.4.1. IP Core Generation Output ( Intel Quartus Prime Standard Edition)
2.5. Simulating Intel FPGA IP Cores
2.5.1. Simulating the Fixed-Transform FFT IP Core in the MATLAB Software
2.5.2. Simulating the Variable Streaming FFT IP Core in the MATLAB Software
2.6. DSP Builder for Altera FPGAs Design Flow
3. FFT IP Core Functional Description
3.1. Fixed Transform FFTs
3.2. Variable Streaming FFTs
3.2.1. Fixed-Point Variable Streaming FFTs
3.2.2. Floating-Point Variable Streaming FFTs
3.3. FFT Processor Engines
3.3.1. Quad-Output FFT Engine
3.3.2. Single-Output FFT Engine
3.4. I/O Data Flow
3.4.1. Streaming FFT
3.4.1.1. Using the Streaming FFT
3.4.1.2. Changing the Direction on a Block-by-Block Basis
3.4.1.3. Enabling the Streaming FFT
3.4.2. Variable Streaming
3.4.2.1. Changing Block Size
3.4.2.2. Changing Direction
3.4.2.3. I/O Order
3.4.2.4. Enabling the Variable Streaming FFT
3.4.2.5. Dynamically Changing the FFT Size
3.4.2.6. I/O Order
3.4.3. Buffered Burst
3.4.3.1. Enabling the Buffered Burst FFT
3.4.4. Burst
3.5. FFT IP Core Parameters
3.6. FFT IP Core Interfaces and Signals
3.6.1. Avalon-ST Interfaces in DSP IP Cores
3.6.2. FFT IP Core Avalon-ST Signals
3.6.2.1. Component Specific Signals
4. Block Floating Point Scaling
4.1. Possible Exponent Values
4.2. Implementing Scaling
4.2.1. Example of Scaling
4.3. Unity Gain in an IFFT+FFT Pair
5. Document Revision History
A. FFT IP Core User Guide Document Archive

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