3.3.1.5. Steps to Run Simulation : Riviera-PRO - 2026-02-11

F-Tile Avalon® Streaming IP for PCI Express* Design Example User Guide
Version
25.3
Product Type
Device Families > Agilex Families > Agilex 7 > M-Series
Device Families > Agilex Families
Device Families > Agilex Families > Agilex 7 > F-Series
Device Families > Agilex Families > Agilex 7
Device Families > Agilex Families > Agilex 7 > I-Series
Resource Type
Documentation > User Guides
ft:sourceName
DITA

Simulation Flow starting with Quartus® Prime 22.4 version

  1. Generate the example design
  2. Follow the steps below:
    1. cd <my_design>/pcie_ed_sim_tb/pcie_ed_sim_tb/sim/aldec
    2. Run the following command from the working directory: 
      vsim -do run_riviera.tcl
    3. A successful simulation ends with the following message: 
      "Simulation stopped due to successful completion!"
Note: Due to a problem in the Quartus® Prime Pro Edition Software version 25.3, a design example simulation with Riviera-Pro may run into a fatal error. This problem is planned to be fixed in a future release.