Cyclone 10 GX CvP Initialization over PCI Express User Guide - 2018-01-02

1. CvP Initialization in Cyclone 10 GX
1.1. Benefits of Using CvP
1.2. CvP System
1.3. CvP Support for Cyclone 10 GX Devices
1.4. CvP Initialization
1.5. CvP Compression and Encryption Features
1.6. CvP Pins
2. Design Considerations for CvP Initialization in Cyclone 10 GX
2.1. Designing CvP for an Open System
2.2. Designing CvP for a Closed System
3. Understanding the Design Steps for CvP Initialization in Cyclone 10 GX
3.1. Generating the Synthesis HDL Files for Cyclone 10 GX PCI Express IP Core
3.2. Setting up the CvP Parameters in Device and Pin Options
3.3. Compiling the Design
3.4. Splitting the SOF File
3.5. Bringing up the Hardware
3.5.1. Installing Jungo WinDriver in Windows Systems
3.5.2. Installing Jungo WinDriver in Linux Systems
3.5.3. Modifying MSEL/DIP switch on Cyclone 10 GX Dev-Kit
3.5.4. Programming CvP Images
4. CvP Driver and Registers
4.1. CvP Driver Support
4.2. CvP Driver Flow
4.3. VSEC Registers for CvP
4.3.1. Altera -defined Vendor Specific Capability Header Register
4.3.2. Altera -defined Vendor Specific Header Register
4.3.3. Altera Marker Register
4.3.4. CvP Status Register
4.3.5. CvP Mode Control Register
4.3.6. CvP Data Registers
4.3.7. CvP Programming Control Register
4.3.8. Uncorrectable Internal Error Status Register
4.3.9. Uncorrectable Internal Error Mask Register
4.3.10. Correctable Internal Error Status Register
4.3.11. Correctable Internal Error Mask Register
A. Document Revision History for Cyclone 10 GX CvP Initialization over PCI Express User Guide

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