DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook - DSP Builder is a high-level synthesis technology that optimizes a high-level, untimed netlist into low-level, pipelined hardware for your target FPGA device and desired clock rate. DSP Builder consists of several Simulink* libraries that allow you to implement DSP designs quickly and easily. DSP Builder implements the hardware as VHDL or Verilog HDL with scripts that integrate with the Quartus® Prime software and the RTL simulator. - 2025-01-24

Version

24.3.1