P-Tile Avalon Memory-mapped IP for PCI Express User Guide - This IP is a companion tile for Agilex and Intel Stratix 10 DX devices. It supports an Avalon memory-mapped interface with up to a Gen4 x16, 512-bit data width to the Application Layer. - 2021-07-14

Version
21.1
Product Type
Device Families > Agilex Families
Device Families > Stratix Families > Stratix 10
Device Families > Agilex Families > Agilex 7
Device Families > Stratix Families
Resource Type
Documentation > User Guides
Source Name
DITA