Enhanced Configuration (EPC) Devices Datasheet - 2016-05-04

1. Enhanced Configuration (EPC) Devices Datasheet
1.1. Supported Devices
1.2. Features
1.3. Functional Description
1.3.1. FPGA Configuration
1.3.1.1. Configuration Signals
1.3.1.2. Fast Passive Parallel Configuration
1.3.1.3. Passive Serial Configuration
1.3.1.4. Concurrent Configuration
1.3.2. External Flash Interface
1.3.3. Intel Flash-Based EPC Device Protection
1.3.4. Dynamic Configuration (Page Mode)
1.3.5. Real-Time Decompression
1.3.6. Programmable Configuration Clock
1.3.7. Flash In-System Programming (ISP)
1.3.7.1. JTAG-based Programming
1.3.7.2. Programming using External Flash Interface
1.4. Pin Description
1.5. Power-On Reset
1.6. Power Sequencing
1.7. Programming and Configuration File Support
1.8. IEEE Std. 1149.1 (JTAG) Boundary-Scan
1.9. Timing Information
1.10. Operating Conditions
1.11. Package
1.11.1. Package Layout Recommendation
1.12. Document Revision History

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