This document demonstrates how to simulate an
Quartus® Prime Standard Edition design in the ModelSim®-
Altera®
FPGA Edition simulator. Design simulation verifies your design before device programming. The
Quartus® Prime software generates simulation files for
supported EDA simulators during design compilation.
ModelSim®-
Altera®
FPGA Edition
Design simulation involves generating setup scripts for your simulator, compiling simulation models, running the simulation, and viewing the results. The following steps describe this flow in detail: