Intel Programmable Acceleration Card (PAC) with Intel Arria 10 GT FPGA Datasheet - 2018-11-02

1. Introduction
2. Overview
2.1. Intel PAC with Intel Arria 10 GX FPGA Block Diagram
2.2. Overview of Product Features
2.2.1. Intel Arria 10 GT FPGA
2.2.2. Fortville Network Interface Controller
2.2.3. On-Board Memory
2.2.4. Interfaces and Dimensions
2.2.5. Software
2.2.6. Power
2.2.7. Board Management Controller (BMC)
2.2.8. Network Interface
2.2.9. Control and Support
2.2.9.1. Parkvale Retimer
2.2.9.2. PCIe Overview
2.2.9.3. Board Management Controller Overview
3. System Compatibility
4. Mechanical Information
5. Thermal Specifications
5.1. Thermal Test Performance Results
6. FPGA Factory Image
7. Board Management Controller
7.1. BMC Features
7.1.1. BMC Voltage and Thermal Handling
A. References
B. Document Revision History for Intel Programmable Acceleration Card (PAC) with Intel Arria 10 GT FPGA Datasheet

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