Altera High Level Synthesis Compiler Pro Edition Best Practices Guide - Provides techniques and practices that you can apply to improve the FPGA area utilization and performance of your HLS component. Typically, you apply these best practices after you verify the functional correctness of your component. - 2025-01-23

Version

24.1

Product Type

Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Pro Edition

Device Families > Arria Families > Arria 10

Device Families > Agilex Families

Device Families > Agilex Families > Agilex 7 > F-Series

Device Families > Stratix Families > Stratix 10

Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software

Device Families > Agilex Families > Agilex 7

Device Families > Cyclone Families

Device Families > Arria Families

Device Families > Stratix Families

Device Families > Cyclone Families > Cyclone V

Device Families > Agilex Families > Agilex 7 > I-Series

Device Families > Cyclone Families > Cyclone 10 > Cyclone 10 GX

Device Families > Cyclone Families > Cyclone 10

Resource Type

Documentation > User Guides

Source Name

DITA