4.8. Managing Device I/O Pins Revision History - 2026-02-19

Quartus Prime Pro Edition User Guide Design Constraints
Version
25.1.1

The following table shows the revision history for this chapter:

Document Version Quartus® Prime Version Changes
2025.07.07 25.1.1
  • Applied initial Altera rebranding throughout.
  • Added notes about I/O assignment requirements before POF file generation to Assigning I/O Pins and Validating Pins Assignments topics.
2024.04.01 24.1
  • Applied initial Altera rebranding throughout.
  • Updated Pin Planner screenshot in Importing and Exporting I/O Pin Assignments topic for current list of file formats supported.
2023.12.04 23.4
  • Updated Altera FPGA Device and I/O Terminology topic for removal of VREF Groups and Edges highlight feature.
  • Updated Pin Planner screenshot in Managing Device I/O Pins topic for removal of VREF Groups and Edges highlight feature.
2023.10.02 23.3
  • Added Assigning I/O Banks topic to describe color coding and saving changes.
  • Added Changing Pin Planner Highlight Colors topic to describe changing report highlight coloring.
  • Added Showing I/O Lanes topic to describe new Show I/O 12 Lanes report.
2022.04.27 22.1 Made a minor fix.
2020.11.04 19.3 Removed references to obsolete FPGA Xchange file (.fx) support from "Integrating PCB Design Tools" and "Importing and Exporting I/O Pin Assignments" topics.
2018.05.07 18.0
  • First release as part of the stand-alone Design Constraints User Guide
2017.11.06 17.1
  • Revised topic: I/O Planning Overview.
  • Revised topic: Basic I/O Planning Flow with the Pin Planner and renamed to Basic I/O Planning Flow with the Pin Planner.
2017.05.08 17.0
  • Renamed command: Run I/O Assignment Analysis to Start Fitter (Plan).
2016.10.31 16.1
  • Implemented Intel rebranding.
2015.11.02 15.1
  • Removed early pin planning and Live I/O Check support from Quartus Prime Pro Edition handbook
  • Changed instances of Quartus II to Quartus Prime.
2014.12.15 14.1
  • Updated Live I/O check device support to include only limited device families.
2014.08.30 14.0a10
  • Added link to information about special pin assignment features for Arria 10 SoC devices.
2014.06.30 14.0
  • Replaced MegaWizard Plug-In Manager information with IP Catalog.
November 2013 13.1
  • Reorganization and conversion to DITA.
May 2013 13.0
  • Added information about overriding I/O placement rules.
November 2012 12.1
  • Updated Pin Planner description for new task and report windows.
June 2012 12.0.0
  • Removed survey link.
November 2011 11.1
  • Minor updates and corrections.
  • Updated the document template.
December 2010 10.0 Template update
July 2010 10.0
  • Reorganized and edited the chapter
  • Added links to Help for procedural information previously included in the chapter
  • Added information on rules marked Inapplicable in the I/O Rules Matrix Report
  • Added information on assigning slew rate and drive strength settings to pins to fix I/O assignment warnings
November 2009 9.1
  • Reorganized entire chapter to include links to Help for procedural information previously included in the chapter
  • Added documentation on near‑end and far‑end advanced I/O timing
March 2009 9.0
  • Updated “Pad View Window” on page 5–20
  • Added new figures:
  • Figure 5–15
  • Figure 5–16
  • Added new section “Viewing Simultaneous Switching Noise (SSN) Results” on page 5–17
  • Added new section “Creating Exclusive I/O Group Assignments” on page 5–18