AN 831: FPGA SDK for OpenCL Host Pipelined Multithread - 2017-11-20

1. Intel FPGA SDK for OpenCL Host Pipelined Multithread
1.1. Introduction
1.2. Pipelining Framework for High Throughput Design
1.3. Optimization Techniques for CPU Tasks
1.3.1. Processor Affinity or CPU Pinning
1.3.2. Cache Optimizations
1.4. Design Example: Data Compression Algorithm
1.4.1. Host Channel Streaming Feature
1.4.2. Pipelining Framework Details
1.4.3. Fine Tuning the Framework Design
1.4.3.1. Huffman Code (Tree) Generation
1.4.3.2. Processor Affinity in GZIP
1.4.4. Performance Evaluation
1.5. Document Revision History

Back to home page